Steering Committee

IAN MACKINTOSH is the Chairman and President of OCP-IP. Mr. Mackintosh is well known in the EDA and Semiconductor industries as an ASIC pioneer with a background in semiconductor design, software development and business management. Mr. Mackintosh, founder of OCP-IP, has been historically on the Boards of groups dedicated to SoC development and IP exchange through open standards and has also chaired working group activity developing Standards for and investigation in, IP Protection. Since 1980, he has held various senior management positions with National Semiconductor, VLSI Technology (now NXP), PMC-Sierra, Mentor Graphics and several start-up companies. He holds a Masters of Science from Southampton University, England.

VESA LAHTINEN received his M.Sc. degree in 1998 and Ph.D. degree in 2004, both in Information Technology, from the Tampere University of Technology (TUT) in Finland. From 1996 to 2004 he worked as a Researcher in the Institute of Digital and Computer Systems of TUT where his main research areas were system-on-chips and their interconnects. In 2004, Lahtinen joined Nokia Research Center and worked there as a Senior Research Engineer in the Computing Architectures Laboratory concentrating on architecture modeling and, specifically, memory architectures. In 2006, he joined the Wireless Platforms unit of the Nokia Technology Platforms, and worked there on electronic system-level design methodologies and standardization. Since 2008, he has been responsible for requirements management and roadmapping in the Modem IP Asset unit of the Wireless Modem entity in Nokia Devices R&D. Dr. Lahtinen is a member of IEEE and author or co-author of over twenty international publications.

TAKASHI YOSHIMORI received a Masters Degree from Osaka University of Computer Science in 1982 and joined TOSHIBA Semiconductor that same year. He worked on EDA development (Static Timing Analysis) in 1983, RTL design for TOSHIBA mid-range computer in 1984, and DFT (Scan, JTAG) in 1985. From 1986 to 1998, Mr. Yoshimori served as Project Manager for TOSHIBA for ASIC/SoC (mainly computer-related LSI) development. He became Senior Manager of TOSHIBA's IP development section in 1999 and worked in the TOSHIBA corporate IP center at TOSHIBA headquarters in 2000. Mr. Yoshimori served as CTO of the IPTC (IP Trade Center) from 2000 to 2001 and became General Manager for TOSHIBA Semiconductor's System LSI Design Division in 2002. He has worked as Technology Executive (SoC Design) for TOSHIBA since 2003.

DREW WINGARD is a founder and the Chief Technical Officer of Sonics, Inc., which has been providing SMART interconnects since 1999. He was the original architect of Sonics' SiliconBackplane and the original creator of the Open Core Protocol Specification. He currently represents Sonics on the Governing Steering Committee of OCP-IP, where he chairs the Specification Working Group.

Prior to founding Sonics, Wingard led the development of advanced circuit and CAD methodology for MicroUnity Systems Engineering, Inc. Previously he had co-founded Pomegranate Technology, where he designed an advanced SIMD multimedia processor. He received a B.S. from the University of Texas, Austin and an M.S. and Ph.D. from Stanford University, all in electrical engineering. While at Stanford, Dr. Wingard's research explored the optimization of design processes between architectural, logical, circuit and physical design with an emphasis on tools and automation.

RALPH MORGAN is currently a Senior Director of Engineering for Synopsys, Inc. where he has spent the last 12 years working in the DesignWare IP group. He currently manages development of Digital IP, Verification IP, and advanced Datapath IP for the Synopsys DesignWare portfolio. He has strong interests in IP Quality and standards that help ASIC designers to efficiently and reliably integrate IP into complex SoC designs. Mr. Morgan received his Masters of Science in Electrical Engineering in 1986 from the University of Washington and since then has held a variety of positions in ASIC Design and EDA.