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Adoption Stories
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New! OVM Verification IP Makes Your SystemVerilog Verification Significantly More Productive Virtual Corporations: The "Collaborate to Innovate" Imperative Cadence Expands Enterprise Verification IP Portfolio by 5X to Provide Industry's Broadest OVM Multi-language Offering OCP-IP Announces Support for Cadence's Assertion Based OCP Protocol Verification IP |
New! OVM Verification IP Makes Your SystemVerilog Verification Significantly More Productive Virtual Corporations: The "Collaborate to Innovate" Imperative Cadence Expands Enterprise Verification IP Portfolio by 5X to Provide Industry's Broadest OVM Multi-language Offering OCP-IP Announces Support for Cadence's Assertion Based OCP Protocol Verification IP |
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| CAST IP Core Integration using OCP: A PCI Express Example SuperSpeed USB 3.0 IP Core from CAST, Inc. Achieves USB-IF Certification |
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New! CircuitSutraCreating An SoC Virtual Platform For Embedded Software Development
OCP-based Programmable Accelerator Design |
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| DAFCA OCP Performance Monitoring with Automated Insertion of Programmable Instruments |
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| Denali Software
OCP-IP Compliance for Databahn™ Memory Controller Cores OCP-based Memory Controller IP Offers Optimal Power and Performance Requirements for 3G Applications |
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| Digital Media Professionals
3D Graphics Hardware IP Uses OCP Bus Interface New! Viewpoint: OCP Application in Vector Graphics Hardware IP Solution |
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| Duolog
Technologies Tracking SoC Performance | |
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| eASIC How to Implement a Digital Oscilloscope in Structured ASIC Fabric |
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| eInfochips Scalable Verification Environment Using OCP Compliant Cores and eRM Compliant eVCs |
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| ENSTA ParisTech Fast Design Productivity for Embedded Multiprocessor through Multi-FPGA Emulation: The case of a 48-way Multiprocessor with NOC |
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| HDL Dynamics New!Integrating Nexus 5001 an 1149.7 with OCP-IP Debug OCP System In-Silicon Instrumentation Solutions - More Than Just Trace |
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| Infineon New! What Debug and Medicine Have in Common
Intel Targets WiMAX with Software Radio Device New! Intel tips Medfield specs, Lenovo, Motorola deals | ||||
| Jasper Design Automation
New! OCP and Verification of Configurable OCP Interfaces |
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| Jetstream Media
Technologies
Video Effects IP Core For Hi-Def DVD recorders, Camcorders and Set-tops Speeds Design With OCP Interfaces | |
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| Kawasaki Microelectronics K-Micro Announces Availability of CatsEye Development Systems K-Micro Adopts OCP Interconnect in SoC for a Multi-function Printer
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| Leiden University
Leiden Adopts OCP-IP |
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| Magillem
Magillem and Sonics Announce Joint Donation of IP-XACT Support of OCP Protocols to OCP-IP |
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| Mentor Graphics OCP 2.2 MVC Accelerates Verification Productivity OCP-IP Announces Availability of Mentor Graphics CheckerWare Library of Verification IP
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Mercury Computer Systems OpenCPI- Open Component Portability Infrastructure Applying Open Standards to FPGA Interfaces |
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| Nascentric Better Products, Happier Customers with Current-Based Simulation/Verification and the Open Core Protocol |
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| Nokia PSL Verification Package for the Open Core Protocol |
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| PLS Development Tools Multicore - A New Challenge for Debugging |
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| Pontifícia Universidade
Católica do Rio Grande do Sul OCP and the Brazil IP Project
Realtek Semiconductor Corporation On-chip Interconnection Design and SoC Integration with OCP |
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| Siemens Can You Afford Not to Have a Platform Strategy? |
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| Sonics Multi-DRAM Systems OCP socket modelling with TLM- 2.0 OCP-IP Checker |
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| SpringSoft
OCP Standard Debug Interface Specification |
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| Tampere University of
Technology Tampere adopts OCP |
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| Technical University of
Denmark University Corner |
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| Texas Instruments
Adding support for power management in OCP TI Unveils Multi-Core OMAP 4 Formal Verification of OCP-based IPs Using Cadence's OCP VIP Library |
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| Toshiba OCP Interconnect Interface for SoC – Verification for the Implementation of Embedded Processors SuperCompanionChip with Audio Visual Interface for Cell Processor |
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| UC Berkeley OCP and UC Berkeley's Department of EECS |
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| University of British
Columbia Destination Network on Chip |
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| VDEC VDEC Enhances STEP Protocol Transducer (Page 6) STEP- Automated Synthesis of On-Chip-Bus Protocol Transducers | |
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| Verilab OCP Profiles and Transactions | |
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| VTT
Electronics University Corner |
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| YogiTech OCP VIP: A Cost Effective and Robust Qualification Process A Methodology for Verifying OCP Interfaces |
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