Events

2013

2013 EDAC CEO Forecast 

When

Thursday March 14, 2013 from 6:00 PM to 8:30 PM PDT 

Where

Doubletree by Hilton Hotel San Jose 

2050 Gateway Pl.
San Jose, CA 95110

Click here to register for the event


ISCUG-2013

A platform to discuss the SystemC based next generation methodologies for design and verification of Electronics Systems (Semiconductor Chips + Embedded Software)

Venue: Noida, India
Tutorial Day: 14th April, 2013 (Sunday)
Conference Day: 15th April, 2013 (Monday)

Click here for : Registration

Early bird discount ends of 28th Feb, 2013



2012

July
MPSoC 2012
July 9-13, 2012
Québec, Canada
Drew Wingard, CTO Sonics


Technion 
June 2012
Israel

May

SEMICO Impact Conference Series: The IP Ecosystem
May 16, 2012
DoubleTree Hotel
San Jose California

April

D&R IPSOC Days - Silicon Valley

Date: April 10, 2012 
Hilton Santa Clara
4949 Great America Parkway
Santa Clara, CA95054 

"IP's Ascent in the Semiconductor Value chain
by Jack Browne, Sr. VP of Sales and Marketing, Sonics, Inc. 


Indian SystemC User Group Conference
April 9 - 10, 2012
Hotel Vivanta by Taj, Bangalore
Register now!


March
D&R and SemIsrael IP SoC Day!

VenueGreen House, Tel Aviv
Date: March 27, 2012
Time: 8:15AM - 14:00PM

IP's Ascent in the Semiconductor Value chain
by Jack Browne, Sr. VP of Sales and Marketing, Sonics


February

EDAC 2012 CEO Forecast
Wednesday February 29, 2012 
6:00 PM to 8:30 PM PST
Silicon Valley Bank
3005 Tasman Drive 
Santa Clara, Ca 95054

January

EDAC 2012 CEO Forecast Indian SystemC Users Group Meeting (ISCUG)

9th April2012, Monday, Bangalore, India

www.iscug.in




2011

December
IP SoC 2011
Dec 7-8, 2011
Grenoble, France

1) "3D Mania: Powering Smartphone SoCs with Multi-channel TSV DRAMs" by Drew Wingard (Sonics) 

2)    Panel: Coherency Challenges in Next Generation SoCs

Moderator: Jack Browne, Sonics

Participants:
Drew Wingard: Sonics
John Goodacre: ARM
Marcello Copola: STMicroelectronics
Bruce Mathewson: ARM




November
IEEE Monthly Technical Meeting (Registration Required)
Tuesday November 8, 2011 Cadence Design Systems San Jose CA
On-Chip Interconnect: Demanding Challenges for SoC, Drew Wingard, CTO Sonics Inc


October 

CODES +ISSS
October 9-14 2011, Taipei, Taiwan
Title: Memory Controllers for High-Performance and Real-Time MPSoCs
Requirements, Architectures, and Future Trends
Authors: Benny Akesson, Po-Chun Huang, Fabien Clemidy, Denis Dutoit, Kees Goossens, Yuan-Hao Chang, Tei-Wei Kuo, Pascal Vivet, and Drew Wingard


For Presentation Slides, Click Here

---------------------------------------------

International Symposium on System-on-Chip 2011
Tampere, Finland 
October 31 - November 2


SSIP 2011 & OCP-IP FORUM Scheme

Shanghai International Convention Center
Shanghai, China
October 25, 2011

Speakers include:
  • Ian Mackintosh, OCP-IP
  • Lauro Rizzati, EVE
  • David Zhang, Cadence
  • Neill Mullinger, Synopsys
  • James McHale, Sonics

June

DAC 2011 - DSNOC
Network-on-Chip Performance Evaluation by on-Chip Hardware Monitoring Network: OCP-IP Benchmarks on 48-core
Xinyu Li - ENSTA ParisTech, France and Omar Hammami - ENSTA ParisTech, France

NoC Traffic Monitoring for Billion Cycle Application Performance Debug Based on FPGA Platform
Xinyu Li - ENSTA ParisTech, France
Omar Hammami - ENSTA ParisTech, France

DAC48 - The 48th Annual Design and Automation Conferences
San Diego, CA
June 5 - 10, 2011

Multicore: Madness or Just Today's Chaos? 
Pavilion Panel featuring Drew Wingard, Sonics CTO (June 7, 4:00pm - 4:45pm, Booth #3421)


May
May 4, 2011
08:15 - 09:15 Hilton Hotel (San Carlos Room)
Speaker: Krishnan Srinivasan Sonics Inc.

March
DATE 2011
March 14-18, 2011 in Grenoble, France
Alpha Data Company Overview
Atomic Rules Overview
Cadence - New Verification IP Catalog Supports Silicon to System Development
Carbon Design Systems Overview
CAST IP - Introduction and OCP Support
Circuit Sutra - Role of Standards in TLM Driven Design & Verification Methodology
Duolog Technologies - SoC Integration Solutions
HDL Dynamics - Integrating with Nexus 5001 and 1149.7 with OCP-IP Debug
Jasper Design Automation - ActiveProp Solution for Property Synthesis
MIPS - Introducing the MIPS32 1074k Superscalar Coherent Processing System (CPS)
Network-on-Chip Benchmarking Work Group - Status Update
Sonics, Inc. - Corporate Introduction


January
EDA Consortium Annual CEO Forecast and Industry Vision
January 5, 2011 in San Jose, CA
Opening Introduction by OCP-IP President Ian Mackintosh
Evening Presentation Video

Past Events

2010


November
IP-XACT 2010
An ECSI Workshop in conjunction with IP-SOC 2010
November 29, 2010
World Trade Center
Grenoble, France
Presentation by Prashant Karandikar - OCP-IP Metadata Working Group Chair


October

Japan Synopsys Users Group Forum (JSNUG)
October 15, 2010 in Tokyo, Japan
OCP-IP President Ian Mackintosh will be presenting from 12:25 PM - 1:05 PM Japan Time


June


System and SoC Debug Integration and Applications
DAC Co-located Event
June 13, 2010 – Anaheim, CA
More Information can be found here:
www.ecsi.org/dac-system-and-soc-debug

Debug Standards Activities: In this session overview of existing active standardization initiatives and recent progress will be presented together with their achievements, roadmaps, current evolution, and industry support.

IP-SoC Day
Date: TBD
Shanghai

DATE: June 13-18, 2010
Anaheim

April

IP-SoC Day
DATE: April 15, 2010
Tel Aviv 

EDAC Consortium Spring 2010 Members Meeting

DATE:  April 15, 2010
TIME: 6:00 PM Receptions 7:00 PM Panel
Cadence Design Systems 
2655 Seely Avenue, Building 10
San Jose, CA 95134

Multicore Expo

DATE:  April 28, 2010
TIME: 3:00-3:45
Session:  Maximizing Multichannel DRAM Performance by Invisible Load Balancing
Speaker:  Drew Wingard, Sonics, Inc

March


IP-SoC Days
DATE: March 23, 2010
TIME: 2:40 P.M.
Session: "Leveraging Your IP in the New Economy" Jack Browne, Sr. VP of Sales and Marketing, Sonics, Inc.
"OCP-IP: A Standard Update", Ian Mackintosh, OCP-IP


DATE '10 
DATE: Wednesday March 10, 2010
TIME:  11:00-12:30
Moderator: Albrecht Mayer, Infineon

"In this panel, designers and researchers who have practical experience with heterogeneous multiprocessor systems, both commercial and research, will draw on those experiences and answer questions such as:
What works in heterogeneous multiprocessor debug?  What are the successful methods and approaches?
What challenges are encountered in real life?
Would new standards help meet the challenges?  Are there new standards developments coming?
How will the methods of today scale to the heterogeneous manycore systems that will come tomorrow?"

February

EDA Consortium Annual CEO Forecast and Industry Vision
January 14, 2009, San Jose Convention Center,





NASCUG 12
DATE: Monday February 22, 2010 in San Jose, CA.
The meeting is co-located with DVCon
Presentation by OCP-IP SLD Working Group