People to Know in OCP-IP




James Aldis




JAMES ALDIS - CO-CHAIR FOR SYSTEM LEVEL DESIGN WORKING GROUP

Mr. Aldis is a Senior Member of Group Technical Staff at Texas Instruments, where he works on the architecture of OMAP SOCs, specifically on-chip networking and SOC performance modelling. Dr Aldis joined TI in 2002. Previously he worked at Ascom AG in Switzerland on specification and implementation of wireless LAN, cellular and powerline communications modems. He has many academic publications and has made contributions to standardisation of GSM, UMTS, 802.11 and the language SystemC. His degree is in pure mathematics from the University of Liverpool and his PhD is from the University of York, on the subject of coded modulation and multi-dimensional geometry.

Joe Basques

JOE BASQUES- DIRECTOR OF COMMUNICATION FOR OCP-IP


Dr. Mark Burton

DR. MARK BURTON- CHAIR FOR SYSTEM LEVEL DESIGN WORKING GROUP

Dr. Burton is the founder of GreenSocs. He graduated from Warwick university with a degree in computer systems engineering, and worked for some years for Inmos (now part of ST microelectornics) and then moved to ACRI (The Advanced Computer Research Institute). He completed a PhD in Artificial Intelligence within Education, specifically focusing on the simulation of high level collaborative learning processes. Mark then worked for ARM becoming the manager of the modeling group.


Chien-Chun (Joe) Chou

CHIEN-CHUNG (Joe) CHOU- CHAIR FOR CACHE COHERENCE SUB-GROUP

Dr. Chou received his M.S. and Ph.D. degrees in Computer Science from University of Iowa, Iowa City, USA by 1992. From 1993 to 1997, Joe was an Associate Professor at the Computer Science and Information Engineering Department of Tamkang University, Taipei, Taiwan. Since 1989, Joe has been working as a senior software engineer for couple CAD/CAM companies at Iowa, and later on as a computer system and performance architect for several Silicon Valley companies including HAL/Fujitsu System Technology, and Intel. Joe is now the Director of Architecture / Advanced Dataflow Group at Sonics, Inc., focusing on specifying and developing



Prashant Karandikar

PRASHANT KARANDIKAR- CHAIR FOR META DATA WORKING GROUP

Mr. Karandikar is Lead Engineer with Systems Modeling and Simulation group in Texas Instruments Inc. He graduated from Pune University in 1999 and completed his Master's Degree in Digital Systems in 2001.


STAN KROLIKOSKI - GOVERNING STEERING COMMITTEE MEMBER

Stan Krolikoski has been deeply involved in standards activities throughout his 25+ year career in the EDA industry. He is currently Group Director of Standards at Cadence Design Systems.  Dr. Krolikoski has previously worked for ChipVision Design Systems as CEO, Cadence as Senior Architect and VP of Marketing, Compass Design Automation as Senior Fellow and Chief Technologist, and CLSI as VP of Engineering.  He holds a Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign and a second Ph.D. in Philosophy from the same university.  He also holds a Philosophy degree from the University of Leuven in Belgium.


Ian Mackintosh

IAN MACKINTOSH- CHAIRMAN AND PRESIDENT OF OCP-IP

Mr. Mackintosh is well known in the EDA and Semiconductor industries as an ASIC pioneer with a background in semiconductor design, software development and business management. Mr. Mackintosh, founder of OCP-IP, has been historically on the Boards of groups dedicated to SoC development and IP exchange through open standards and has also chaired working group activity developing Standards for and investigation in, IP Protection. Since 1980, he has held various senior management positions with National Semiconductor, VLSI Technology (now NXP), PMC-Sierra, Mentor Graphics and several start-up companies. He holds a Masters of Science from Southampton University, England.



NEILL MULLINGER - GOVERNING STEERING COMMITTEE MEMBER

Neill Mullinger is a group marketing manager at Synopsys. In this role he focuses on verification IP and methodology support and has product manager responsibility for Synopsys DesignWare Verification IP. Neill joined Synopsys in 2000 and has over 20 years experience in the hardware and EDA industries, bringing an extensive background of verification experience to bear on product and methodology definition.


Erno Salminen

ERNO SALMINEN- CHAIR FOR NoC BENCHMARKING WORKING GROUP

Mr. Salminen is a member of the DACI research group working on projects including NocBench and FunBase. Erno is a student member of IEEE.  He is also a staff member at the University of Tampere Finland in the Department of Computer Systems.




Dr. Neal Stollon

DR. NEAL STOLLON- CO-CHAIR OF DEBUG WORKING GROUP

Dr. Stollon is principal engineer at HDL Dynamics and is focused on systems and technical engineering and marketing for systems on-chip architecture and instrumentation solutions. He has over 25 years of digital design and processor development experience at MIPS Technologies, LSI Logic, Alcatel, Texas Instruments, and others. Dr. Stollon has a Ph.D in EE from SMU, is a Texas Professional Engineer, has written over 35 technical papers, holds 10 patents, and is a Senior Member of IEEE.


Bohumir (Bob) Uvacek

BOHUMIR (Bob) UVACEK, Ph.D., BBA-CHAIR FOR THE DEBUG WORKING GROUP

Dr. Uvacek has worked for Phonak Switzerland, GN Danavox, Resound, Toshiba America, Pixelworks, and Dolby Labs with a focus on improving DSP processing, rapid prototyping in real-time, chip making, system simulation. Bob has led teams to successful designs and production in SoC chips for hearing aids, sonar, printers, codecs, VoIP phones or novel LED color monitors, with a focus on efficient information processing and perceptual coding in hearing and vision.


Drew Wingard

DREW WINGARD- CHAIR FOR THE SPECIFICATION WORKING GROUP

Dr. Wingard is a founder and the Chief Technical Officer of Sonics, Inc., which has been providing SMART interconnects since 1999. He was the original architect of Sonics' SiliconBackplane and the original creator of the Open Core Protocol Specification. He currently represents Sonics on the Governing Steering Committee of OCP-IP, where he chairs the Specification Working Group. Prior to founding Sonics, Wingard led the development of advanced circuit and CAD methodology for MicroUnity Systems Engineering, Inc. Previously he had co-founded Pomegranate Technology, where he designed an advanced SIMD multimedia processor. He received a B.S. from the University of Texas, Austin and an M.S. and Ph.D. from Stanford University, all in electrical engineering. While at Stanford, Dr. Wingard's research explored the optimization of design processes between architectural, logical, circuit and physical design with an emphasis on tools and automation.


Drew Wingard

GABRIELE ZARRI- CHAIR FOR THE FUNCTIONAL VERIFICATION WORKING GROUP

Mr. Zarri is a Verification IP Solutions Architect for Cadence Design Systems. He is in charge of the verification solutions' deployment for Cadence's OCP and MIPI products. He is currently leading many OCP-related verification projects.





 To contact any of the above, please email admin@ocpip.org