Network on Chip Benchmarking Initiative:  a Snapshot on the Who, the What and they Why

Cristian Grecu, University of British Columbia

Networks-on-chip (NoCs) are generally viewed as the ultimate solution for the design of modular and scalable communication architectures. NoCs provide support to the integration of heterogeneous cores through the standardization of the network boundary. NoC architectures are effective at mitigating the delay limitations in signal propagation across deep-submicron interconnects and can significantly improve design predictability and shorten the design cycle.

Numerous groups in industry and academia are working towards providing solutions aimed at NoC design flow components, including architectures, protocols, mapping algorithms, simulation environments, etc.  However, due to the multitude of design parameters and trade-offs involved, it is virtually impossible to compare two different NoC platforms. Performance figures are meaningless if not accompanied by an exhaustive description of assumptions, design choices and experimental setup. To advance and accelerate the state of the art of the NoC paradigm R&D, the research community is in need of widely available reference benchmarks that allow a sensible comparison.

OCP-IP members from the University of British Columbia (Canada), Royal Institute of Technology (Sweden), Carnegie Mellon University (USA), Tampere University of Technology (Finland) and Washington State University (USA) have joined forces to lead this ambitious initiative. Their objective is to provide a set of benchmarks aimed at the full NoC design flow, ranging from design specifications and performance evaluation to testability and fault tolerant features. As such, the major directions currently pursued by members of the Network‑on‑Chip Benchmarking Initiative are focused on the following three themes:

  • application modeling and design metrics for NoC benchmarking;
  • micro‑benchmarks for exercising and analyzing specific features of  NoCs;
  • benchmarking methodologies for assessing testability and reliability of NoCs.

The founding group of this initiative is seeking contributions and participation from other interested parties. In particular, at this stage, we are specifically looking for NoC hardware descriptions and high‑level application data relevant to benchmarking activity. Please provide us with comments and viewpoints on our efforts. Better still, formally join our group to participate and lead the directions of this initiative. Please contact OCP-IP at admin@ocpip.org or Cristian Grecu at grecuc@ece.ubc.ca for more information.

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