|
2008
|
|
|
July 1
|
Leveraging
OCP for Cache Coherent Traffic Within an Embedded Multi-core
Cluster
July OCP-IP Newsletter & Embedded
Systems
|
|
June
|
Current Trends in the Standardization of Multicore Debugging (German
Only)
|
|
May/June
|
Overview of Debug Standardization Activities (Abstract Only; Full Article
Available for Purchase)
Design & Test
|
|
May 19
|
Buzz@DAC & Kuhl@CAL
EDACafe
|
|
May 13
|
Ensuring
silicon Intellectual Property interoperability with OCP consensus
profiles
Embedded.com
|
|
April 26
|
Model
Workers - Electronics System Level
IET
|
|
April 21
April 7
April 1
April 1
April 1
Mar 17
Mar 6
|
IP Standards: No Room for Mr. Nice Guy
EDACafe
Panelists: New
Multicore Debug Approaches, Standards Needed
SCD Source
Single
Flow for Interconnecting OCP-based IP and Auto-generating Design
Views
EDA Designline
DATE
'08 Interview with OCP-IP President, Ian Mackintosh
EDACafe
MIPS Combines
Multi-threading with Coherent Multicore IP
SCD Source
OSCI Aims for June with TLM 2.0 Release
IET
Standards Advance for Virtual Prototyping - Smattering of new specs,
products in the works
EE Times
|
|
Mar 3 |
March 2008 OCP-IP Update
for HWS World
EDA Designline
|
|
Jan/Feb |
Debug
Grows Increasingly Critical
Chip Design
|
|
Jan 29 |
IP - European Style
Embedded Technology Journal
|
|
Jan 14 |
Automated Formal Verification of OCP-based IP's Using Cadence's OCP VIP
Library
EDA Designline
|
|
Jan 9
|
OCP VIP: A Cost Effective and Robust Qualification Process for Multimedia
and Telecom SoC Designs
Embedded.com |
|
2007
|
|
|
Dec 11
|
Intel Targets WiMAX with Software Radio Device
Electronicsweekly.com |
|
Sept 17
|
VSIA's
Work Lives On In Its Children
SOCcentral |
|
Sept 11
|
MPSoC and
'The Vision Thing'
EDA Tech Forum |
|
Sept 5
|
Virtual System
Prototyping Solutions from VaST Systems Technology |
|
Sept 4
|
Introduction
to and Regression Test for OCP SystemC Channel Models
EDA Designline |
|
Sept 4
|
Introduction
to and Regression Test for OCP SystemC Channel Models
EDA Designline |
|
Aug/Sept
|
Link
IP Cores With Smart Interconnects for Complex SoCs
Chip Design |
|
July 14
|
Defining
Standard Debug Interface Socket Requirements for OCP-compliant Multicore
SoCs: Part 1
Embedded.com |
|
July 14
|
Defining
Standard Debug Interface Socket Requirements for OCP-compliant Multicore
SoCs: Part 2
Embedded.com |
|
July 2
|
Refining Multicore Concepts -
Part 2 (A roundtable with OCP-IP President, Ian Mackintosh)
EDN |
|
July 29
|
SuperCompanionChip - Making Optimum Use of Cell Broadband Engine
Toshiba Review |
|
June 22
|
Refining Multicore Concepts (A roundtable with OCP-IP President, Ian
Mackintosh)
EDN |
|
June 21
|
Collaborating for IP Quality (A roundtable with OCP-IP President, Ian
Mackintosh)
Electronic Design |
|
June 19
|
OCP System In Silicon Instrumentation Solutions - More Than Just
Trace
iDesign / Chip Design |
|
May 29
|
Cadence Attacks Assertion-based Verification Bottlenecks
EE Times |
|
May 10
|
Verifying Configurable Verification Interfaces Using OCP
EDA DesignLine |
|
May 8
|
DAC
Preview: ESL
Electronic Design |
|
May 8
|
Quo Valis, SLD?
Reasoning About the Trends and Challenges of System Level Design
Copyright © 2007 IEEE - Reprinted from Proceedings of the
IEEE
This material is posted here with permission of the IEEE. Such permission
of the IEEE does not in any way imply IEEE endorsement of any of OCP
International Partnership's products or services. Internal or personal use
of this material is permitted. However, permission to reprint/republish
this material for advertising or promotional purposes or for creating new
collective works for resale or redistribution must be obtained from the
IEEE by writing to pubs-permissions@ieee.org.
|
|
April 16
|
OCP Application On 3D Graphics Hardware IP
Video/Imaging DesignLine |
|
March 9
|
Advanced
interconnects drive intelligent vision applications (Part 2)
Automotive DesignLine |
|
March 7
|
Advanced interconnects drive intelligent vision applications (Part
1)
Automotive DesignLine |
|
March 6
|
Initiative targets network-on-chip benchmarking
EE Times |
|
February 19
|
Arteris Ships Arteris NoC
Solution 1.6, Lowers Power Requirements, Improves Flexibility, Usability
of NoC
Business Wire |
|
February 12
|
Roundtable:
Is IP Really That Bad?
EDA Cafe |
|
February 5
|
OCP Moves Toward the Formulation of On-Chip Interconnect Version of
Dhrystone
Nikkei Electronics |
|
January 30
|
First Silicon Solutions Introduces System Navigator Pro Series of High
Performance Trace Probes
FS2/MIPS Technologies |
|
January 18
|
Utilizing OCP to Design a High Performance Interconnect
EDA Designline
|
|
2006
|
|
|
|
|
|
December
|
DDR
Memory Systems at the Heart of Consumer Electronics
Denali Software, Inc.
|
|
|
|
|
December 14
|
PSL Verification Package for the Open Core Protocol
|
|
|
EDA DesignLine
|
|
|
|
|
October 10
|
On-Chip
Interconnect Scheme Reaches for Broader Appeal
|
|
|
Electronic Design
|
|
|
|
|
September
|
VSIA September
Newsletter
VSIA
|
|
September
|
Link
IP Cores with Smart Interconnects for Complex SoCs
Chip Design
|
|
August 25
|
MP:
SoCs: What Are the Tools?
Electronic News
|
|
|
|
|
July 19
|
Processor Model Aims
to Unite Design Flow
Electronicstalk
|
|
July 17
|
Vast Adds Performance, Power Enhancements to Flagship Tool
EE Times
|
|
|
|
|
July 12
|
How to Implement a Digital Oscilloscope in Structured ASIC
Fabric
DesignLine
|
|
|
|
|
July 10
|
Transactor Library Eases System-level IP Incorporation
EE Times
|
|
|
|
|
July 10
|
Novas Makes Transaction-based Analysis More Accessible to HDL
Users
Forbes
|
|
|
|
|
July 7
|
Firm's Initiative Targets SystemC IP Interoperability
EE Times
|
|
|
|
|
June 13
|
YOGITECH Extends OCP
Verification Component Functionality
Design and Reuse
|
|
|
|
|
June 13
|
OCP-IP
Releases Functional Coverage Guidelines
EE Times
|
|
|
|
|
June 1
|
GreenSocs Joins Open SystemC Initiative
EE Times
|
|
|
|
|
May 25
|
Communication Nightmares Grow
Electronic News
|
|
|
|
|
May 18
|
Jasper Design
Automation Joins OCP-IP
Design and Reuse
|
|
|
|
|
May 16
|
Sonics Offers
Low-cost SMART Interconnects(TM) Solution; New Version of S3220(TM) Adds
OCP 2.0 Support
|
|
|
Design and Reuse
|
|
|
|
|
May 8
|
OCP 'Tags' Support High-performance SoCs
EE Times
|
|
|
|
|
April 17
April 13
March 30
March 13
March
February 6
|
Send Your 3D Graphics Content Over OCP
MH DesignLine
IP
Integration Is Standard Fare
Electronic Design
Master
On-Chip Embedded Multiprocessor Coherence
Electronic Design
SYSTEM-LEVEL
DESIGN: Summit Design Offers 'Personal Edition' of SystemC IDE on
Web
EE Times
Transactional-Level
Modeling Benefits Memory Controller
Chip Design
CoWare Adds MIPS32 34K Processor Support Package to SystemC-based
Model Library
|
|
|
Embedded Computing
|
|
|
|
|
January 23
|
CoWare Launches New
Modeling Solution for Platform-driven ESL Design
|
|
|
Design and Reuse |
|
|
|
|
January 9
|
Better
Products, Happier Customers with Current-Based Simulation/Verification and
the Open Core Protocol
|
|
|
Design and Reuse
|
|
|
|
|
2005
|
|
|
December
|
OCP-IP Member Solutions Guide
Chip Design
|
|
|
|
|
December 12
|
Video Effects IP Core For Hi-Def DVD Recorders, Camcorders and Set Tops
Speeds Design With OCP Interfaces
|
|
|
VI DesignLine
|
|
|
|
|
December 12
|
OCP-based
Memory Access Arbitration For a Digital Sampling
Oscilloscope
|
|
|
Design & Reuse
|
|
|
|
|
December 6
|
OCP Is One For Me
|
|
|
PL DesignLine
|
|
|
|
|
November
|
OMAP 2420 Antes Up For Handsets
|
|
|
EE Times
|
|
|
|
|
November 28
|
Use OCP
Interface Technology in SIPs for Video Coding
|
|
|
Comms Design / EETimes
|
|
|
|
|
October 31
|
SoC Design Success:
Winning with Standards
|
|
|
HWS World
|
|
|
|
|
October 17 |
OCP
Interface for SoC - Verifying the Implementation of Embedded
Processors
|
|
|
Design and Reuse
|
|
|
|
|
September 26
|
On Chip Instrumentation Aids OCP Debugging
|
|
|
EE Times
|
|
|
|
|
September 9
|
The
Importance of Sockets in SoC Design
|
|
|
Chip Design Magazine
|
|
|
|
|
September 1
|
Transaction-Level
Models Are Becoming Easier to Use
|
|
|
Electronic Design
|
|
|
|
