IP '08
Grenoble, France

Design Automation Conference
System and SoC Debug Workshop
Anaheim Convention Center

Multicore Expo
Debugging Multicore Software Panel
Debugging Multicore Software Panel Presentation
Santa Clara Convention Center
Great American Ballrooms J & K

ECSI System Debug Workshop
DATE 2008
EDACafe Interview with OCP-IP President, Ian Mackintosh
ICM, Munich
Munich, Germany

DVCon 2008
World Trade Center
Grenoble, France

Presentation

IP '07 (formerly IPSoC 2007)
World Trade Center
Grenoble, France

Panel: "Semiconductor IP - Who should be the Standards Torch Bearer?"

Warren Savage, CEO IPextreme, with the participation of OCP-IP, Mentor Graphics, Improv Systems, NXP & SPIRIT Consortium

2007 OCP-IP Debug & Verification Seminar

FDL 2007
Advance Programme
Casa de Convalescència
Barcelona, Spain
September 18, 2007
10:00 - 11:30
Session CSD1: Abstraction Layers for TLM
Mark Burton, GreenSocs

" Transaction Level Modeling: A reflection on what TLM is and how TLMs may be classified"

25th VLSI Test Symposium

Claremont Resort & Spa
Berkeley, California
May 9, 2007
14:00 - 15:30
Session 13B - Hot Topic: Testing in the Presence of NoCs
Professor Andre Ivanov
"An Initiative Towards Open Network-on-Chip Benchmarking"

1st ACM/IEEE International Symposium on Network-on-Chips

Princeton University
Princeton, New Jersey< Paper: Towards Open Network-on-Chip Benchmarks

Panel: "Proliferating the Use and Acceptance of NoC Benchmark Standards"
Moderator: Ian Mackintosh, President OCP-IP
Participants:
Drew Wingard, Sonics
Timothy Pinkston, USC and NSF
John Bainbridge, Silistix
Radu Marculescu, CMU
Monday, May 7, 2007
1:00 P.M.

"Dinner Talk: Reflections on 10 years as a commercial
on-chip interconnect provider"
Drew Wingard, Sonics, Inc.
May 8, 7:00 P.M.
Prospect House

DATE 2007 Network-on-Chips Workshop

14:00
Session 4: Benchmarks for NoC Test and Reliability
C. Grecu, University of British Columbia
A. Jantsch, KTH Stockholm
P. Pande, Washington State University

DATE 2007 Debug Panel

Rhodes Level 2
Nice Acropolis Convention Center
Nice, France
17:00 - 17:45

Presentation: Debug Related Standards: What's Up and What's Next?
Moderator: Dr. Neal Stollon, FS2/MIPS
Panelists:
Anthony Berent, ARM
Dr. Albrecht Mayer, Infineon
Rolf Kuehnis, Nokia
Dr. Alan Su, ITRI
Dr. Robert Uvacek, Pixelworks

ECSI Institute Workshop on System-on-Chip Debug Standards

Hotel Novotel, Paris, France
10:00 A.M. - 6:00 P.M.
Session 1: Introduction
Session 2: Industry Needs and Requirements
Session 3: Standardization
Session 4: Industrial Debug Solutions

Non-Blocking Multi-Threaded, Multi-Channel & Multi-Data Flow Challenges:

How Smart Interconnects Best Feed Heterogeneous Multicores in SoC Designs
Santa Clara Convention Center
Time: 13:30 - 14:15 PST

Multicore Expo

Panel: Sorting Out the Standards of Multicore Debug
Santa Clara Convention Center

Time: 15:15 - 16:00 PST
Moderator: Ron Wilson, Executive Director, EDN Magazine
Bob Uvacek, OCP-IP
Felix Burton, Eclipse
Rod Crawford, SPIRIT for debug
Al Crouch, JTAG
Neal Stollon, FS2
Richard Schooler, Multicore Association

This panel provides an overview into several standards efforts related to multicore debug with representation from IEEE working groups including Nexus Forum, IJTAG (IEEE P1687), as well as working groups within the OCP-IP, Multicore Association, SPIRIT, and Eclipse consortiums.

Presentation: OCP-IP Update and Importance of Infrastructure Supporting Design Standards

Ian Mackintosh; OCP-IP
December 7, 2006
IP-SoC
World Trade Center
5 Place Robert Schuman
Grenoble, France

Presentation: OCP-IP Provides the Standard TLM Socket

Mark Burton; GreenSocs and James Aldis; TI
December 4, 2006
World Trade Center
5 Place Robert Schuman
Grenoble, France

Presentation: OCP-IP Introduction and Importance of Infrastructure Supporting Design Standards

Ian Mackintosh; OCP-IP
November 30, 3:30 PM
IP China 2006
Hotel Nikko New Century
Zhonghua Hall
Beijing, China