ECSI
Institute Workshop on
System
Debug
March
10, 2008 (9:00-18:00)
Registration
deadline: March 4th,
2008
Sponsors: OCP-IP, ARM, PLS Development Tools, Magillem, Mentor Graphics, Synplicity, Wind River, SPRINT Project [IP
FP6-2004-IST-4]
Agenda:
Session 1:
Introduction/Challenges (9:00-9:45
[0h45])
This session will present an
overview and a “topology map” of the existing
standardization activities will be
presented, as well as their relations
to industry initiatives and de facto
standards
Session 2:
Industry Requirements (9:45-10:45 [0h20 each =
1h00])
· Pre-silicon Debugging Needs for
Large Multi-core SoC Designs - SPRINT Project
(ST, Infineon, NXP, ARM) – · ARM -
· LSI Logic Requirements –
Break (10:45-11:15
[0h30])
Session 3: Debug
Standards Activities (11:15-13:15 [0h15 each, OCP-IP
0h30])
· OCP Debug Socket for Multi-Core
Debugging –
For the first time ever
OCP-IP will announce the release of its Debug Standard. The new standard
identifies the signal set for debugging of multiple processor cores connected
with the OCP interface. The standard represents a breakthrough allowing
designers to distribute debug signals as part of the system interface scheme;
rather than wired separately from the data path as had been previously done.
This innovative new approach greatly enhances system provider’s ability to
prepare multi-core debug hardware and software that can be easily obtained as IP
for new chip designs. Join us as we discuss this exciting new standard. Copies
of the standard can be downloaded at www.ocpip.org
· SPIRIT IP-XACT Debug WG –
· Eclipse Device Debugging 1.0: DSF
Framework + GDB Debugger -
· power.org –
· Target Communication Framework - A
Common Tool/Target Communication Infrastructure". –
· SPRINT Multi-Core Debug API - A
Standard Debugger Interface for (C-)models and Silicon –
Lunch (13:15-14:00
[0h45])
Session 4: Debug
Tools Presentations (14:00-16:15 [0h15 each =
2h00])
· ARM
CoreSight
·
· The Confirma Platform for ASIC, SoC
and IP debug in FPGA –
· Magillem: IP-XACT Flow Control for
Debug –
·
· Lauterbach Debugging Tools –
· Tool
Support for Infineons Multi-Core Debug Solution - Thomas
Groeger, pls Programmierbare Logik &
Systeme
· Debugging using the SHAPES Virtual
Platform –
Session 5: Demos
+ Networking (16:15-18:00 [coffee served during the
session])
Parallel demonstrations, free
discussion, networking, and next steps in
standardization
Workshop Information
& Registration Workshop description &
registration: www.ecsi.org/sysdebug/
The workshop is free for
ECSI Industrial & Associate Members (see conditions on the registration
form)! Please register on-line or fill-in
the form found on the web page and fax it back to ECSI to +33 4 76 42 87
87
Registration deadline: March 4th, 2008 More
information
For any
additional inquiries, please contact:
Parc Equation - 2, Avenue de Vignate - 38610 GIERES, France Ph: +33 476 63 49 34 - Fax: +33 476 42 87 87 - Email: office@ecsi.org - http://www.ecsi.org Proceedings
All
workshop participants will obtain the electronic
version (PDF files) of all presentations after
the workshop.
The presentations will be downloadable from the ECSI web page. Venue
NH
Hotel München Deutscher Kaiser
Arnulfstrasse
2
80335
München
Ph: +49.89.99345
681
Fax: +49.89.99345
620
Directions and maps will be sent to
the registered persons and will be made available on the workshop web
site. |