University of British Columbia

The OCP interface is a critical component of one of the very ambitious projects "Communication-centric Interconnect Infrastructure for future SoCs" undertaken in the System-on-Chip research laboratory at the University of British Columbia.

System-on-Chip (SoC) design in the forthcoming billion-transistor era will involve the integration of numerous heterogeneous semiconductor intellectual property (IP) blocks. Some of the main problems in the ultra deep sub micron technologies characterized by gate lengths in the range of 32-90nm arise from non-scalable global wire delays, failure to achieve global synchronization, errors due to signal integrity issues, and difficulties associated with non-scalable bus-based functional interconnect. To address these problems we introduce a new design methodology, where a switch-based network-centric architecture to interconnect IP blocks is proposed. One of the main objectives of our research is to design a network-centric communication fabric, which is to be used to transfer data among multiple IP blocks in a big SoC.

To ease seamless integration of different IP blocks with this communication fabric, we propose to use two levels of interfacing. The first level is the OCP socket, which captures the specific control and data signals of each IP and converts them into a standard set of signals. The second level is a custom-designed interface that packetizes these signals and sends to the communication fabric.

By using the OCP socket we are able to decouple the functionality of the IP from its communication fabric, which is important for global synchronization of SoCs designed in ultra deep sub micron era. In all our Infrastructure IP related projects we are using OCP as a wrapper for the cores.

Since its opening in 1915, the University of British Columbia has developed a reputation for innovation and excellence in both teaching and research, and has become a leader in higher education in Canada. Further information is available at www.ubc.ca. 

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