UVM-AMS Standard Development
“Extending the Benefits of UVM to Include AMS: An Update on Accellera’s UVM-AMS Standard Development”
The emerging UVM-AMS standard is the focus of an article written by UVM-AMS Working Group members Tom Fitzpatrick and Peter Grove and recently published in Semiconductor Engineering. UVM has provided the industry with great productivity and reuse benefits for digital designs, and the plan is that UVM-AMS will extend those benefits to include a standardized AMS methodology that can scale, is reusable, and promotes metric-driven, mixed-signal verification. Read the full article here.
SystemC Evolution Fika Videos Now Available
The most recent SystemC Evolution Fika was held in September with a focus on safety-related use cases of SystemC-based virtual prototypes. There were three technical presentations:
- “A Fault-Injection Methodology for the System-Level Reliability Analysis of Computing Systems Modeled in SystemC”
- “Dynamic Fault Injection with SystemC AMS for Quantitative Safety Verification”
- “QEMU Based Fault Effect Analysis for RISC-V”
For more information, including the abstracts, presentations, and additional recordings from the September session, visit here.
Clock Domain Crossing Standard being Explored
A new Proposed Working Group (PWG) will focus on defining a standard Clock Domain Crossing (CDC) collateral specification to ease SOC integration. Currently, SoC teams cannot reuse IP-level CDC collateral in the SoC environment if both teams use different CDC verification tools, causing a time-consuming CDC verification problem. Standardization on CDC collateral will bring significant benefit to not only product companies, but also IP design houses, EDA tool companies, and the entire ecosystem. For more information about the PWG, visit here.
- November newsletter now available
- Article: Extending The Benefits Of UVM To Include AMS: An Update On Accellera’s UVM-AMS Standard Development
- Podcast: The History, Reach and Impact of Accellera with Lynn Garibaldi
- Article: Accellera at DVCon U.S. 2022 in the Metaverse!
- EDACafe Bunker Broadcast Video: Pre-silicon D&V innovation and standardization efforts from Accellera Accellera
- Article: Design rules for functional safety are explored at DAC
- Where Is the Functional Safety Standard and Why Adopt It?
- Portable Stimulus: What's Coming in 2.0 and What it Means For You
- Getting to Know Accellera’s Emerging Hardware Security Standard: Security Annotation for Electronic Design Integration
- UVM-AMS: A UVM-Based Analog Verification Standard